Microcode:

Stepping	Version
SOC A	N/A
SOC B	M03506C9_0000003C
SOC F-1	M03506CA_0000001A

---

• Camera Support Requirement:

  1. Windows 10 RS1

  2. Driver Install manually

  3. BIOS Setting Change (Administrator Mode) CRB Setup -> CRB Chipset -> Uncore Configuration -> IPU Enabled/Disabled : Enabled CRB Setup -> CRB Chipset -> Uncore Configuration -> SA IPU ACPI Mode : IGFX Child Boot -> OS Selection : Windows

     OV8856 : CRB Setup -> CRB Chipset -> Uncore Configuration -> Rear Camera : IMX135 OV2740 : CRB Setup -> CRB Chipset -> Uncore Configuration -> Front Camera : OV2740 (H/W A1.1: Only support one kind of camera at the same time)

• BIOS Flash Rule : Please flash BIOS to [UPA1AM39_FPT] first, then could be flash to [UPA1AM40] or later versions

• Note :

  1. SMBIOS(DMI) Information will be cleared after flash BIOS to [UPA1AM39]
  2. FPGA F/W is different between A1.0 and A1.1 Motherboard

Checksum: 16MB:0552h Sign-on Message: UP-APL01 R6.1 (UPA1AM61)(08/12/2021)

Change:

1. Support Build-in Shell
2. Update CPU Microcode
3. Update GOP Bin to 1036
4. Patch system will hang BIOS logo when connect some 4K monitor
5. Prevent RTL8111G/H device loss when S3 resume
6. Set PMIC IC BUCK4 VID to 1.85V for improving eMMC compatibility

Checksum: 16MB:42BCh Sign-on Message: UP-APL01 R6.0 (UPA1AM60)(06/02/2021)

Change:

1. Update code base to 5.12_1ATJS_RC1.5.2_061
2. Support modify Boot priority by BIOX

Checksum: 16MB:92EDh Sign-on Message: UP-APL01 R5.3 (UPA1AM53)(03/31/2021)

Change:

1. Fixed Memory Speed show unknown in SMBIOS Type 17

Checksum: [16]MB:[A6CD]h

Sign-on Message: UP-APL01 R5.2 (UPA1AM52)(08/04/2020)

Change:

1. Patch PMIC may cause the system won't boot in low temperature
2. Patch SMBIOS type 17 corruption

Checksum: [16]MB:[C225]h

Sign-on Message: UP-APL01 R5.1 (UPA1AM51)(03/17/2020)

Change:

1. Update CPU Microcode M03506C9_00000040, M03506CA_0000001E
2. Add Restore AC Power Loss item in BIOS setup

Checksum: [16]MB:[B0FE]h

Sign-on Message: UP-APL01 R5.0 (UPA1AM50)(12/17/2019)

Change: Control source of RTC wake function changed to By OS as default

Checksum: [16]MB:[5B17]h

Sign-on Message: UP-APL01 R4.9 (UPA1AM49)(12/13/2019)

Change:

1. Set PCIE_P3 speed as Gen 2 and PCIe Selectable De-emphasis as disable for Intel AC9260
2. Added a setup item for setting the control source of RTC wake function
3. Delete non-BIOS created boot option to fix issue that boot option disabled suddenly

Checksum: [16]MB:[1673]h

Sign-on Message: UP-APL01 R4.8 (UPA1AM48)(10/17/2019)

Change:

1. Correct SMIOBS type 17 data memory type and form factor
2. Remove the new DRR support of Samsung.K4F6E3S4HM-MGCJ
3. Disabled the DTS to fix/work around the issue that the system hung on the OS logo
4. Implemented signal tuning parameters for all EMMC SKU

Checksum: [16]MB:[E1DA]h

Sign-on Message: UP-APL01 R4.7 (UPA1AM47)(09/26/2019)

Change:

1. To support new on-board memory chip, Micron.MT53E256M32D2DS-053 WT:B, Micron.MT53D512M32D2DS-053 WT:D and Samsung.K4F6E3S4HM-MGCJ.
2. Update SMBIOS type 17 Manufacturer and PartNumber field.

Checksum: [16]MB:[D024]h

Sign-on Message: UP-APL01 R4.6 (UPA1AM46)(08/14/2019)

Change:

1. Set "OS reset select" as "Warm Reset" to fix the issue that OS restart becomes cold reset.
2. Patch issue that TPM self-test CMD is timeout sometimes.
3. Enable iTCO as default.
4. Intel uCode update for Intel-SA00233

Checksum: [16]MB:[180B]h

Sign-on Message: UP-APL01 R4.5 (UPA1AM45)(07/11/2019)

Change:

1. Intel microcode update
2. SMBIOS and HSIO signal tuning change for F-1 stepping support

Checksum: [16]MB:[B76A]h

Sign-on Message: UP-APL01 R4.4 (UPA1AM44)(06/27/2019)

Change:

1. Spec. Change - To add iTCO function with the default timer of 30 seconds. iTCO is default disabled
2. and can be enabled by setup item iTCO.

Checksum: [16]MB:[A2B3]h

Sign-on Message: UP-APL01 R4.3 (UPA1AM43)(03/14/2019)

Change: Update microcode to support F1 CPU stepping

Checksum: [16]MB:[0AF5]h

Sign-on Message: UP-APL01 R4.2 (UPA1AM42)(03/12/2019)

Change:

1. FOR H/W Changed: Support H/W A1.1 FPGA Register MAP
2. Fix the issue that setup item "Core 1" cannot disable CPU core 1
3. Detect EMMC size then program different signal tuning value

Checksum: [16]MB:[42E2]h

Sign-on Message: UP-APL01 R4.1 (UPA1AM41)(09/21/2018)

Change:

1. FOR H/W Changed: Support H/W A1.1 FPGA Register MAP
2. Patched : EMMC Storage will be lost when 0 degrees randomly.

Checksum: [16]MB:[6B83]h

Sign-on Message: UP-APL01 R4.0 (UPA1AM40)(08/06/2018)

Change:

1. Spec. Changed: Supported Two Setup Options to Control Directions of HAT Pins; 12 & 35
2. Fixed : "Quiet Boot" will not be Reload to Default when User Press "F3" in BIOS Setup Menu

Checksum: [16]MB:[513B]h

Sign-on Message: UP-APL01 R3.9 (UPA1AM39)(06/29/2018)

Change:

1. Fixed: DP/HDMI Flickering under Windows 10 when System is Idling
2. Fixed: User-Level Password will be Lost after Re-load BIOS Default

Checksum: [16]MB:[F4FE]h

Sign-on Message: UP-APL01 R3.8 (UPA1AM38)(06/20/2018)

Change:

1. Spec. Changed: Support Setup Options to Control EXHAT Pin 50/52/54/58/60
2. Upgrade ApolloLake CPU Microcode

Checksum: [16]MB:[2A7E]h

Sign-on Message: UP-APL01 R3.7 (UPA1AM37)(04/18/2018)

Change: For H/W A1.1 Changed: birdir_EXHAT12/13/14/15 change from LPSS_I2C5/6 to LPSS_I2C2/3 - Changed for Windows 10 IoT Core & ubiLinux PinCtrol

Checksum: [16]MB:[026D]h

Sign-on Message: UP-APL01 R3.6 (UPA1AM36)(04/10/2018)

Change:

1. For H/W A1.1 Changed : LPSS_I2C0/I2C1 Mux Function birdir_HAT18/19/20/21 change from ISH_GPIO13/12/11/10 to SIO_SPI_2_FS0/SIO_SPI_2_CLK/SDIO_CLK/AVS_I2S2_MCLK
2. For H/W A1.1 Changed: birdir_EXHAT12/13/14/15 change from LPSS_I2C5/6 to LPSS_I2C2/3
3. Spec. Change: Request from Intel, HAT PIN 12/35 Default as Output Direction for I2S Function
4. Spec. Change: Request from Intel, Change aDSP Key from cAvsImage1Manifest to cAvsImage0Manifest
5. Remove Intel ISS Debug/Trace Support for Formal Release Version

Note: SMBIOS(DMI) Information will be cleared after flash BIOS to this version

Checksum: [16]MB:[1BE6]h

Sign-on Message: UP-APL01 R3.5 (UPA1AM35)(02/13/2018)

Change: Power Consumption will be Decreased by less than 1 second

Checksum: [16]MB:[418A]h

Sign-on Message: UP-APL01 R3.4 (UPA1AM34)(01/19/2018)

Change:

1. PM Request: CPU Power Limit to 13W
2. Support Android-IA
3. For H/W A1.1 Changed: Emutex Request - SMBIOS Base Board Version will be "V0.5" on H/W A1.1 Board
4. For H/W A1.1 Changed: MIPI Camera Design Changed
5. For Intel Security Advisory - Update CPU Microcode

Checksum: [16]MB:[1749]h

Sign-on Message: UP-APL01 R3.3 (UPA1AM33)(01/17/2018)

Change:

1. Spec. Changed - BIOS Logo Change

Checksum: [16]MB:[35CB]h

Sign-on Message: UP-APL01 R3.2 (UPA1AM32)(12/14/2017)

Change:

1. Fixed: USB 3.0 key will run lower speed after updating TXE ver.3.1.50.2222

Checksum: [16]MB:[9C3F]h

Sign-on Message: UP-APL01 R3.1 (UPA1AM31)(12/12/2017)

Change:

1. Intel Request: Support Apollo Lake DCI Debug Interface

Note:

1. SMBIOS Information will be lost after flashing to this version.

Checksum: [16]MB:[86DB]h

Sign-on Message: UP-APL01 R3.0 (UPA1AM30)(12/07/2017)

Change:

1. Fix the issue that after disabling setup item LPSS SPI#1, SPI#3 will disappear too.
2. Fix the issue that resource Hub proxy 4 contains I2C0 and I2C1 controller, once either one is disabled then the other one will not work (ProblemCode:51 in OS DM).
3. Disable other functions under the same device when function 0 is disabled on the first boot for SPI, UART, and I2C.
4. Fixed: Intel ME/TXE Security Issue
5. Update Apollo Lake Intel PMC FW v03.1d.00 Release
6. Emutex's Request: Support Setup Option Control for SPI ADC124S101 Channel 0 ~ 3
7. Workaround: HDMI / Display Port will flickering with non-recommend resolution under Windows 10

Note:

1. SMBIOS Information will be lost after flashing to this version.

Checksum: [16]MB:[E407]h

Sign-on Message: UP-APL01 R2.3 (UPA1AM23)(11/17/2017)

Change:

1. FOR Win10 IoT Core: Support WIN10 IoT core UWP (Universal Windows Platform).
2. Resource Hub proxy will present only when setup OS Selection is Win10 IOT Core. Known Issue:
3. After disabling setup item "LPSS SPI#1", SPI#3 will disappear too.
4. Resource Hub proxy 4 contains I2C0 and I2C1 controllers, once either one is disabled then the other one will not work (ProblemCode:51 in OS DM).
5. MSFT GpioTestTool.exe will get all the 54 pins in resource Hub proxy in order. User will confuse with the HAT GPIO pin number because we are now transferring the pin number in our OS APP.

Checksum: [16]MB:[6DBF]h

Sign-on Message: UP-APL01 R2.2 (UPA1AM22)(10/11/2017)

Change: Fixed: Blink Display under Windows with E0 Stepping CPU

Checksum: [16]MB:[1078]h

Sign-on Message: UP-APL01 R2.1 (UPA1AM21)(09/01/2017)

Change: Emutex Request : [LPSS I2C #2 Speed] default as [Standard Mode]

Checksum: [16]MB:[1CCA]h

Sign-on Message: UP-APL01 R2.0 (UPA1AM20)(08/11/2017)

Change:

1. FOR Win10 IoT Core: Support Secure Boot and Disabled as default.
2. Fixed : Custom SMBIOS Information will be gone after CMOS Battery loss
3. Fixed : Default Administrator Password will be gone after BIOS Restore Default
4. Emutex Request: USB OTG Enabled as Default, and Override Related Register Settings

Checksum: [16]MB:[9B56]h

Sign-on Message: UP-APL01 R1.9.1 (UPA1AM19)(07/27/2017)

Change: Supported fTPM - Intel PTT

Note: Only for AAEON Internal

Checksum: [16]MB:[3B2A]h

Sign-on Message: UP-APL01 R1.9 (UPA1AM19)(07/05/2017)

Change:

1. Custom Request: Dynamic Hide a virtual Emutex's ASL Device under Windows, depend on "OS Selection" under Setup Menu
2. Fixed: CPU Frequency Incorrect when EIST Disabled